Semiconductor memory devices are continually shrinking in size while at the same time increasing in density or volume and operating at a lower power. The operations of memory devices are synchronized based on clock signals, which may reach different parts of a memory device at different times. A difference in signal paths results in various problems including a reduced read time margin, which may lead to data being improperly read from the memory.
Read tracking circuits for memory cells provide signals based on which read signals for memory cells having data written therein are generated. Generally, the read tracking circuits are designed such that a worst case condition for reading memory cells is covered. For advanced semiconductor memory devices, designing proper read tracking circuits is a challenge.